Code generation attributes

The following attributes are used for controlling code generation.

Optimization hints

The cold and inline attributes give suggestions to generate code in a way that may be faster than what it would do without the hint. The attributes are only hints, and may be ignored.

Both attributes can be used on functions. When applied to a function in a trait, they apply only to that function when used as a default function for a trait implementation and not to all trait implementations. The attributes have no effect on a trait function without a body.

The inline attribute

The inline attribute suggests that a copy of the attributed function should be placed in the caller, rather than generating code to call the function where it is defined.

Note: The rustc compiler automatically inlines functions based on internal heuristics. Incorrectly inlining functions can make the program slower, so this attribute should be used with care.

There are three ways to use the inline attribute:

  • #[inline] suggests performing an inline expansion.
  • #[inline(always)] suggests that an inline expansion should always be performed.
  • #[inline(never)] suggests that an inline expansion should never be performed.

Note: #[inline] in every form is a hint, with no requirements on the language to place a copy of the attributed function in the caller.

The cold attribute

The cold attribute suggests that the attributed function is unlikely to be called.

The no_builtins attribute

The no_builtins attribute may be applied at the crate level to disable optimizing certain code patterns to invocations of library functions that are assumed to exist.

The target_feature attribute

The target_feature attribute may be applied to a function to enable code generation of that function for specific platform architecture features. It uses the MetaListNameValueStr syntax with a single key of enable whose value is a string of comma-separated feature names to enable.

fn main() {
#[cfg(target_feature = "avx2")]
#[target_feature(enable = "avx2")]
unsafe fn foo_avx2() {}

Each target architecture has a set of features that may be enabled. It is an error to specify a feature for a target architecture that the crate is not being compiled for.

It is undefined behavior to call a function that is compiled with a feature that is not supported on the current platform the code is running on, except if the platform explicitly documents this to be safe.

Functions marked with target_feature are not inlined into a context that does not support the given features. The #[inline(always)] attribute may not be used with a target_feature attribute.

Available features

The following is a list of the available feature names.

x86 or x86_64

Executing code with unsupported features is undefined behavior on this platform. Hence this platform requires that #[target_feature] is only applied to unsafe functions.

FeatureImplicitly EnablesDescription
adxADX — Multi-Precision Add-Carry Instruction Extensions
aessse2AES — Advanced Encryption Standard
avxsse4.2AVX — Advanced Vector Extensions
avx2avxAVX2 — Advanced Vector Extensions 2
bmi1BMI1 — Bit Manipulation Instruction Sets
bmi2BMI2 — Bit Manipulation Instruction Sets 2
cmpxchg16bcmpxchg16b - Compares and exchange 16 bytes (128 bits) of data atomically
f16cavxF16C — 16-bit floating point conversion instructions
fmaavxFMA3 — Three-operand fused multiply-add
fxsrfxsave and fxrstor — Save and restore x87 FPU, MMX Technology, and SSE State
lzcntlzcnt — Leading zeros count
movbemovbe - Move data after swapping bytes
pclmulqdqsse2pclmulqdq — Packed carry-less multiplication quadword
popcntpopcnt — Count of bits set to 1
rdrandrdrand — Read random number
rdseedrdseed — Read random seed
shasse2SHA — Secure Hash Algorithm
sseSSE — Streaming SIMD Extensions
sse2sseSSE2 — Streaming SIMD Extensions 2
sse3sse2SSE3 — Streaming SIMD Extensions 3
sse4.1ssse3SSE4.1 — Streaming SIMD Extensions 4.1
sse4.2sse4.1SSE4.2 — Streaming SIMD Extensions 4.2
ssse3sse3SSSE3 — Supplemental Streaming SIMD Extensions 3
xsavexsave — Save processor extended states
xsavecxsavec — Save processor extended states with compaction
xsaveoptxsaveopt — Save processor extended states optimized
xsavesxsaves — Save processor extended states supervisor


This platform requires that #[target_feature] is only applied to unsafe functions.

Further documentation on these features can be found in the ARM Architecture Reference Manual, or elsewhere on

Note: The following pairs of features should both be marked as enabled or disabled together if used:

  • paca and pacg, which LLVM currently implements as one feature.
FeatureImplicitly EnablesFeature Name
aesneonFEAT_AES - Advanced SIMD AES instructions
bf16FEAT_BF16 - BFloat16 instructions
btiFEAT_BTI - Branch Target Identification
crcFEAT_CRC - CRC32 checksum instructions
ditFEAT_DIT - Data Independent Timing instructions
dotprodFEAT_DotProd - Advanced SIMD Int8 dot product instructions
dpbFEAT_DPB - Data cache clean to point of persistence
dpb2FEAT_DPB2 - Data cache clean to point of deep persistence
f32mmsveFEAT_F32MM - SVE single-precision FP matrix multiply instruction
f64mmsveFEAT_F64MM - SVE double-precision FP matrix multiply instruction
fcmaneonFEAT_FCMA - Floating point complex number support
fhmfp16FEAT_FHM - Half-precision FP FMLAL instructions
flagmFEAT_FlagM - Conditional flag manipulation
fp16neonFEAT_FP16 - Half-precision FP data processing
frinttsFEAT_FRINTTS - Floating-point to int helper instructions
i8mmFEAT_I8MM - Int8 Matrix Multiplication
jsconvneonFEAT_JSCVT - JavaScript conversion instruction
lseFEAT_LSE - Large System Extension
lorFEAT_LOR - Limited Ordering Regions extension
mteFEAT_MTE - Memory Tagging Extension
neonFEAT_FP & FEAT_AdvSIMD - Floating Point and Advanced SIMD extension
panFEAT_PAN - Privileged Access-Never extension
pacaFEAT_PAuth - Pointer Authentication (address authentication)
pacgFEAT_PAuth - Pointer Authentication (generic authentication)
pmuv3FEAT_PMUv3 - Performance Monitors extension (v3)
randFEAT_RNG - Random Number Generator
rasFEAT_RAS - Reliability, Availability and Serviceability extension
rcpcFEAT_LRCPC - Release consistent Processor Consistent
rcpc2rcpcFEAT_LRCPC2 - RcPc with immediate offsets
rdmFEAT_RDM - Rounding Double Multiply accumulate
sbFEAT_SB - Speculation Barrier
sha2neonFEAT_SHA1 & FEAT_SHA256 - Advanced SIMD SHA instructions
sha3sha2FEAT_SHA512 & FEAT_SHA3 - Advanced SIMD SHA instructions
sm4neonFEAT_SM3 & FEAT_SM4 - Advanced SIMD SM3/4 instructions
speFEAT_SPE - Statistical Profiling Extension
ssbsFEAT_SSBS - Speculative Store Bypass Safe
svefp16FEAT_SVE - Scalable Vector Extension
sve2sveFEAT_SVE2 - Scalable Vector Extension 2
sve2-aessve2, aesFEAT_SVE_AES - SVE AES instructions
sve2-sm4sve2, sm4FEAT_SVE_SM4 - SVE SM4 instructions
sve2-sha3sve2, sha3FEAT_SVE_SHA3 - SVE SHA3 instructions
sve2-bitpermsve2FEAT_SVE_BitPerm - SVE Bit Permute
tmeFEAT_TME - Transactional Memory Extension
vhFEAT_VHE - Virtualization Host Extensions

wasm32 or wasm64

#[target_feature] may be used with both safe and unsafe functions on Wasm platforms. It is impossible to cause undefined behavior via the #[target_feature] attribute because attempting to use instructions unsupported by the Wasm engine will fail at load time without the risk of being interpreted in a way different from what the compiler expected.

simd128WebAssembly simd proposal

Additional information

See the target_feature conditional compilation option for selectively enabling or disabling compilation of code based on compile-time settings. Note that this option is not affected by the target_feature attribute, and is only driven by the features enabled for the entire crate.

See the is_x86_feature_detected or is_aarch64_feature_detected macros in the standard library for runtime feature detection on these platforms.

Note: rustc has a default set of features enabled for each target and CPU. The CPU may be chosen with the -C target-cpu flag. Individual features may be enabled or disabled for an entire crate with the -C target-feature flag.

The track_caller attribute

The track_caller attribute may be applied to any function with "Rust" ABI with the exception of the entry point fn main. When applied to functions and methods in trait declarations, the attribute applies to all implementations. If the trait provides a default implementation with the attribute, then the attribute also applies to override implementations.

When applied to a function in an extern block the attribute must also be applied to any linked implementations, otherwise undefined behavior results. When applied to a function which is made available to an extern block, the declaration in the extern block must also have the attribute, otherwise undefined behavior results.


Applying the attribute to a function f allows code within f to get a hint of the Location of the "topmost" tracked call that led to f's invocation. At the point of observation, an implementation behaves as if it walks up the stack from f's frame to find the nearest frame of an unattributed function outer, and it returns the Location of the tracked call in outer.

fn main() {
fn f() {
    println!("{}", std::panic::Location::caller());

Note: core provides core::panic::Location::caller for observing caller locations. It wraps the core::intrinsics::caller_location intrinsic implemented by rustc.

Note: because the resulting Location is a hint, an implementation may halt its walk up the stack early. See Limitations for important caveats.


When f is called directly by calls_f, code in f observes its callsite within calls_f:

fn main() {
fn f() {
    println!("{}", std::panic::Location::caller());
fn calls_f() {
    f(); // <-- f() prints this location

When f is called by another attributed function g which is in turn called by calls_g, code in both f and g observes g's callsite within calls_g:

fn main() {
fn f() {
    println!("{}", std::panic::Location::caller());
fn g() {
    println!("{}", std::panic::Location::caller());

fn calls_g() {
    g(); // <-- g() prints this location twice, once itself and once from f()

When g is called by another attributed function h which is in turn called by calls_h, all code in f, g, and h observes h's callsite within calls_h:

fn main() {
fn f() {
    println!("{}", std::panic::Location::caller());
fn g() {
    println!("{}", std::panic::Location::caller());
fn h() {
    println!("{}", std::panic::Location::caller());

fn calls_h() {
    h(); // <-- prints this location three times, once itself, once from g(), once from f()

And so on.


This information is a hint and implementations are not required to preserve it.

In particular, coercing a function with #[track_caller] to a function pointer creates a shim which appears to observers to have been called at the attributed function's definition site, losing actual caller information across virtual calls. A common example of this coercion is the creation of a trait object whose methods are attributed.

Note: The aforementioned shim for function pointers is necessary because rustc implements track_caller in a codegen context by appending an implicit parameter to the function ABI, but this would be unsound for an indirect call because the parameter is not a part of the function's type and a given function pointer type may or may not refer to a function with the attribute. The creation of a shim hides the implicit parameter from callers of the function pointer, preserving soundness.

The instruction_set attribute

The instruction_set attribute may be applied to a function to enable code generation for a specific instruction set supported by the target architecture. It uses the MetaListPath syntax and a path comprised of the architecture and instruction set to specify how to generate the code for architectures where a single program may utilize multiple instruction sets.

The following values are available on targets for the ARMv4 and ARMv5te architectures:

  • arm::a32 - Uses ARM code.
  • arm::t32 - Uses Thumb code.
fn foo_arm_code() {}

fn bar_thumb_code() {}